订阅小程序
旧版功能

A Multi-Bit PUF Architecture Using a 2T Sub-Threshold Voltage Divider

Massimo Vatalaro,Raffaele De Rose, Vincenzo Maccaronio,Marco Lanuzza,Felice Crupi

2025 IEEE International Symposium on Circuits and Systems (ISCAS)(2025)

引用 0|浏览0
关键词
PUF,hardware security,sub-threshold voltage divider,multi-bit,SMV
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要