An 8-Bit 4-Gs/s Single-Channel Two-Step ADC Featuring Non-Symmetrical Pipeline Timing and Hybrid-Loop Amplifier
IEEE Transactions on Very Large Scale Integration (VLSI) Systems(2025)
关键词
Analog-to-digital converter (ADC),CMOS,gated-ring oscillator (GRO),hybrid,pipelined,time-domain (TD)
AI 理解论文
溯源树
样例

生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要