Signal Integrity Simulations of 4JL Gate Pulses from 4 K to 50 K
IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY（2025）
关键词
Logic gates,Scattering parameters,Cables,Data models,Substrates,Signal integrity,Superconductivity,Stripline,Silicon,Semiconductor device modeling,Four-junction logic gate,Josephson-CMOS memory,signal integrity,superconductor-semiconductor interface circuit
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