A Pay-Per-ISE RISC-V Processor with Hardware-Assisted Orthogonal Obfuscation
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS（2024）
Key words
Instruction set authorization,orthogonal obfuscation,Pay-per-instruction set extension (ISE),reduced instruction set computer-five (RISC-V),Instruction set authorization,orthogonal obfuscation,Pay-per-instruction set extension (ISE),reduced instruction set computer-five (RISC-V)
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