C4TERO: Configurable Cascaded Carry Chains for High Reliability TERO PUFs on FPGAs
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS（2024）
Key words
Computer architecture,Microprocessors,Field programmable gate arrays,Circuits,Circuit stability,Physical unclonable function,Delays,Physical unclonable function (PUF),field programmable gate array (FPGA),carry chain,configurable ring oscillators,high-reliability
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