Design Framework for Ferroelectric Gate Stack Engineering of Vertical NAND Structures for Efficient TLC and QLC Operation

Dipjyoti Das, Lance Fernandes,Prasanna Venkatesan Ravindran,Taeyoung Song,Chinsung Park,Ashrah Afroze,Mengkun Tian,Hang Chen, Winston Chem,Kijoon Kim,Jongho Woo,Suhwan Lim,Kwangsoo Kim,Wanki Kim,Daewon Ha,Shimeng Yu,Suman Datta,Asif Khan

2024 IEEE INTERNATIONAL MEMORY WORKSHOP, IMW（2024）

引用 2|浏览21

关键词

Gate Stack,Vertical NAND,Ferroelectric Gate Stack,Annealing Temperature,Switching Voltage,Memory Window,Suitable Voltage,Bottom Layer,Voltage Curves,Positive Pulse,Charge Migration,Ferroelectric Layer,Ferroelectric Switching

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要