Design of MoS2 Based Inverter Circuits Considering Interface Trap Effect
PROCEEDINGS OF THE 37TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, VLSID 2024 AND 23RD INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, ES 2024（2024）
Key words
Inverter,Compact model,MoS2 FET,Interface,Trap,Verilog-A.
AI Read Science
Must-Reading Tree
Example
Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined