9.1 A 2mw 70.7db SNDR 200ms/s Pipelined-SAR ADC with Continuous-Time SAR-Assisted Detect-and-Skip and Open-then-Close Correlated Level Shifting
IEEE International Solid-State Circuits Conference（2024）
Key words
dB SNDR,Sampling Time,Power Efficiency,Times Of Need,Output Node,Open Loop,Conversion Time,Noise Performance,Amplifier Gain,Amplification Stage,Stage Conversion,Optimal Gain,Ambient Temperature Variation,Extensive Costs,Virtual Ground,External Clock,Open-loop Gain
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