Verification and Validation of ITER Interlock System Fast Architecture According to IEC 61508 Standard

I. Garcia-Siguero,A. Carpeno,E. Barrera, D. Karkinsky, Ignacio-Prieto Diaz,A. Marqueta

IEEE TRANSACTIONS ON NUCLEAR SCIENCE（2023）

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关键词

CompactRIO,field-programmable gate array (FPGA),IEC 61508,interlock system,SystemVerilog,verification and validation (V & V)

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