A 40gb/s PAM4 Baud-Rate CDR with Equal-Slope Algorithm
2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)（2022）
关键词
BER,bit rate 40 Gbit/s,CMOS process,equal-slope algorithm,equal-slope algorithm,ES-CDR algorithm,feedforward equalizer,FFE,hardware cost,loss 12 dB,magnitude lower bit error rate,MM-CDR,PAM4 baud-rate CDR,PAM4 baud-rate clock and data recovery,recovered eye-height,sampling point optimisation,size 28.0 nm,timing margin,transmitter
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