A Content - Adapted FPGA Memory Architecture with Pattern Recognition Capability and Interval Compressing Technique
2018 31st IEEE International System-on-Chip Conference (SOCC)（2018）
关键词
interval compressing technique,high-energy physics experiments,Compact Muon Solenoid experiment,multilevel trigger system,Phase-II-Upgrade,CMS tracking system,current trigger system,Level 1 Track Trigger,state-of-the-art pattern recognition filter,ASIC,content addressable memory architecture,FPGA design,data compression,stored data,pattern recognition,LHC,adapted FPGA memory architecture
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