Architecting an Energy-Efficient DRAM System for GPUs
2017 23RD IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA)（2017）
关键词
energy-efficient DRAM system,GPU,DRAM architecture,throughput processors,DRAM row buffers,DRAM bank,DRAM datapath,semi-independent subchannels,static data reordering scheme,toggle rate,energy consumption,die-stacked DRAM,memory access protocol
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