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Hardware Preprocessing for the H1-Level 2 Neural Network Trigger Upgrade

JC Prevotet,B Denby,J Fent,W Frochtenicht,P Garda,B Granado,W Haberer,G Grindhammer,L Janauschek,C Kiesling,T Kobler,B Koblitz,G Nellen,S Schmidt,E Tzamariudaki,S Udluft

IEEE Transactions on Nuclear Science（2002）

Cited 2|Views7
Key words
field programmable gate arrays (FPGAs),neural networks,preprocessing,trigger circuits
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