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A Class-D CMOS DCO with an on-chip LDO

European Solid State Circuits Conference(2014)

Lund Univ.

Cited 16|Views12
Abstract
This paper presents the co-design of a class-D digitally-controlled oscillator (DCO) and a low-dropout voltage regulator (LDO) generating the supply voltage for the DCO. Despite the high intrinsic supply pushing of the class-D oscillator topology, the LDO noise has only a very marginal impact on the DCO phase noise. The class-D DCO and LDO have been integrated in a 65 nm CMOS process without any thick top metal layer. The oscillation frequency is tunable between 3.0 GHz and 4.3 GHz, for a tuning range of 36%, with a fine frequency step below 3kHz and a fine frequency range of 10 MHz (both measured at 3GHz). Drawing 9.0 mA from 0.4V (corresponding to an unregulated supply voltage of 0.6 V), the phase noise is -145.5 dBc/Hz at a 10 MHz offset from a 3.0GHz carrier. The resulting FoM is 189.5 dBc/Hz, and varies less than 1dB across the tuning range. The FoM increases to above 190 dBc/Hz when the regulated supply voltage is 0.5 V.
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Key words
CMOS digital integrated circuits,MMIC oscillators,field effect MMIC,phase noise,voltage regulators,CMOS process,DCO phase noise,class-D CMOS DCO,class-D digitally-controlled oscillator,class-D oscillator topology,current 9.0 mA,frequency 3.0 GHz to 4.3 GHz,low-dropout voltage regulator,on-chip LDO noise,oscillation frequency,size 65 nm,supply voltage,voltage 0.4 V,voltage 0.5 V,voltage 0.6 V,CMOS,DCO,LDO,VCO,class-D,high efficiency,low phase noise,low-voltage,voltage regulator
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