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Papers共 48 篇Author StatisticsCo-AuthorSimilar Experts

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37.1 IBM Telum II Processor Design-Technology Co-Optimizations for Power, Performance, Area, and Reliability
David Wolpert, Gerry Strevig, Christopher J. Berry,Leon J. Sigal,Bill Huott,Mark Cichanowski,Matthias Pflanz,Tobias Werner,Philipp Salz, Nick Jinq,Michael Romain, Iris Leefken, Richard E. Serton, Rajesh Veerabhadraiah, Dureseti Chidambarrao, Robert Arelt, Matt Angyal, Ben Trombley,Arvind Haran,Stefan Hougardy, Ben Klotz, Rahul M. Rao
IEEE International Solid-State Circuits Conferencepp.606-608, (2025)
Cited0Views0EIWOSBibtex
0
0
J Warnock 22nm Next-Generation IBM System Z Microprocessor ISSCC 2015 Slidedeck
J.D. Warnock,Brian Curran,John Badar,Gregory Fredeman,D. Plass, Ya-chih Chan,Seán Carey, G. Salem, F. Schroeder,F. Malgioglio,G. Mayer,Christopher Berry, David de Oca Zapiain,Yiu-Hing Chan, Maria Mayo,John Isakson, Chandrashekhar Nagarajan, T. Werner,L. Sigal,Ricardo Nigaglioni,Mark Cichanowski,Jeffrey A. Zitz, M. Ziegler, T. Bronson, G. Strevig, Dan Dreps,Ruchir Puri, Daniel G. Malone,D. Wendel, P. Mak, Mike Blake
openalex（2015）
Cited0Views0Bibtex
0
0
IBM Z13 Circuit Design and Methodology
J. Warnock,C. Berry,M. H. Wood,L. Sigal,Y. Chan,G. Mayer, M. Mayo,Y-H. Chan,F. Malgioglio, G. Strevig, C. Nagarajan,S. Carey, G. Salem, F. Schroeder,H. H. Smith,D. Phan, R. H. Nigaglioni,T. Strach,M. M. Ziegler, N. Fricke, K. Lind,J. L. Neves, S. H. Rangarajan, J. P. Surprise, J. M. Isakson,J. Badar, D. Malone,D. W. Plass, A. Aipperspach,D. F. Wendel,R. M. Averill,R. Puri
IBM Journal of Research and Development（2015）
Cited7Views0EIWOSBibtex
7
0
POWER GRID DESIGN FOR INTEGRATED CIRCUITS
L Sigal, J Warnock
mag（2014）
Cited23Views0Bibtex
23
0
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Author Statistics

#Papers: 48

#Citation: 1723

H-Index: 23

G-Index: 41

Sociability: 6

Diversity: 2

Activity: 0

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