Professor Hoe’s current research focus is on devising a new FPGA architecture for power efficient, high-performance computing. His research group is working on the CoRAM application development framework that (1) presents a virtualized FPGA execution environment and (2) offers a high-level programming abstraction to specify the control sequencing of kernel invocations and data movements. He is further developing an FPGA runtime environment that incorporates partial reconfiguration, virtualization, and protection features to manage an FPGA as a dynamically sharable multitasking compute resource.