My recent, novel research findings include power side-channel vulnerabilities in quantum computer controllers and attacks on reset gates in quantum computers. My other exciting research findings include novel Secure TLBs and frameworks for security verification of processor caches and whole architectures; hardware accelerators for code-based and hash-based post-quantum cryptographic algorithms, as well as hardware accelerators for digital signature schemes currently being considered for standardization by NIST. I also research security attacks and defenses for nascent Cloud FPGA computing paradigm and novel side and covert channels in Cloud FPGAs; and DRAM-based Physically Uncloneable Functions.

My research is supported through current grants: NSF grant 2312754 (Quantum Databases); NSF grant 2245344 (Side Channel Detection and Repair); NSF grant 1901901 (Cloud FPGA Security); and NSF grant 1651945 (DRAM PUFs). In addition, my research benefits from grants and funding from SRC and TII. I am also thankful for industry donations from Xilinx and Intel (formerly Altera), and for donation of cloud computing credits from Amazon (AWS). I am further thankful for support of IBM Quantum and Quantinuum with their in-kind donation of compute access to their quantum computers.